1. Field of the Invention
The present invention generally relates to a method of manufacturing a multilayer substrate structure, and more specifically to a method of manufacturing a multilayer substrate structure for fine line by forming an interlayer connection pad after the process of drilling and filling so as to overcome alignment tolerance and improve the yield rate of products.
2. The Prior Arts
FIGS. 1A to 1D schematically and respectively illustrate the successive steps of manufacturing a multilayer substrate structure in the prior arts. As shown in FIG. 1A, a substrate 10 is provided with two seed layers 20 on the upper and lower surfaces by electroplating, respectively, and two patterned photo resist layers 200 are then formed on the two seed layers 20, respectively. Next in FIG. 1B, a first circuit pattern layer 30 and a second circuit pattern layer 32 are formed at the openings of the surfaces of the two patterned photo resist layers 200, respectively. The first circuit pattern layer 30 includes a first circuit pattern 31 and a first connection pad 33, and similarly the second circuit pattern layer 32 includes a second circuit pattern 37 and a second connection pad 39. The second connection pad 39 has a shape of a ring with a central region 40. In FIG. 1C, the patterned photo resist layers 200 and the seed layers 20 are removed, and an opening 100 is formed by drilling the central region 40 of the second connection pad 39. Specifically, the opening 100 stops at the first connection pad 33. Further referring to FIG. 1D, the opening 100 and the central region 40 are filled with metal by electroplating such that the first circuit pattern 31 is electrically connected to the second circuit pattern layer 32. Finally, a first solder mask 51 and a second solder mask 53 are formed on the upper surfaces of the first circuit pattern layer 30 and the second circuit pattern layer 32, respectively. The first solder mask 51 covers most of the first circuit pattern 31 and part of the first connection pad 33, and the second solder mask 53 covers most of the second circuit pattern 37 and part of the second connection pad 39. One shortcoming of the above example in the prior arts is that the seed layers 20 are located on the first circuit pattern 31 and the second circuit pattern layer 32, and the seed layers 20 are removed by etching. As a result, part of the first circuit pattern 31 and the second circuit pattern layer 32 are possibly removed at the same time, and it is thus needed to increase the width of the first circuit pattern 31 and second circuit pattern layer 32 with specific width for circuit compensation. Traditionally, the thickness of the seed layers 20 is about 1 to 2 μm, and the typical width and pitch for the present technology are about 10 μm such that the loss due to etching is up to 20 to 40%, resulting in challenging bottleneck in technology.
For another example in the prior arts, FIGS. 2A to 2D respectively illustrate the steps of manufacturing the multilayer substrate structure. The present example is intended to improve the circuit compensation for etching in the first example so as to implement much finer line and achieve much denser circuitry. As shown in FIG. 2A, two steel plates 500 and a plastic sheet 12 are prepared. Each steel plate 500 is provided with a seed layer 20 by electroplating, and a first circuit pattern layer 30 and a second circuit pattern layer 32 are formed by the image transfer process, respectively. Then in FIG. 2B, the two steel plates 500 and the plastic sheet 12 are pressed together so as to embed the first circuit pattern layer 30 and the second circuit pattern layer 32 into the plastic sheet 12. The two steel plates 500 and the seed layers 20 are removed. The steps shown in FIGS. 2C and 2D are similar to the first example. A first opening 100 is formed by drilling, and then filled with metal by electroplating to form a first solder mask 51 and a second solder mask 53. The seed layers 20 are located on the upper and lower surfaces after removing the steel plates 500 such that the first circuit pattern layer 30 and the second circuit pattern layer 32 are not affected during the step of removing. Therefore, it is no need to design larger width for circuit compensation.
However, the actual situation is possibly like what FIGS. 2B′ and 2C′ show. Because of certain tolerance of the machine used in the step of pressing, typically about 40 to 100 μm, the position of the circuit while pressed is possibly what FIG. 2B′ shows. That is, the first circuit pattern layer 30 and the second circuit pattern layer 32 obviously deviate from the preset position. Therefore, it is possible to penetrate the plastic sheet 12 while drilling by laser, if the first connection pad 33 and the second connection pad 39 are offset too much. Owing to the alignment tolerance larger than the width, it needs a method of manufacturing a multilayer substrate structure without circuit compensation so as to overcome the drawbacks in the prior arts.